module: signal_source_four_phase
description: 
parameters:  double frequency, double duty_cycle
inputs:  double phase
outputs:  double_interp ph1, double_interp ph2
             double_interp ph3, double_interp ph4
classes:  SigGen siggen1("square",frequency,Ts), And and1()
          Delay duty_delay(), Delay delay2(), Delay delay3(), Delay delay4()
static_variables:  
init:  
double delay_val;

if (frequency < 1e-30)
  {
   printf("error in 'signal_source_four_phase':  frequency must be > 1e-30\n");
   printf("   in this case, frequency was set to '%5.3g'\n",frequency);
   printf("   -> please update the appropriate 'signal_source_four_phase'\n");
   printf("      block within your schematic\n");
   exit(1);
  }
if (duty_cycle/frequency <= Ts)
  {
   printf("error in 'signal_source_four_phase':  duty_cycle/frequency must be > Ts\n");
   printf("   in this case, duty_cycle was set to '%5.3g'\n",duty_cycle);
   printf("   duty_cycle/frequency = %5.3g\n",duty_cycle/frequency);
   printf("   Ts = %5.3e\n",Ts);
   printf("   -> please update the appropriate 'signal_source_four_phase'\n");
   printf("      block within your schematic\n");
   exit(1);
  }

if (duty_cycle > 0.4)
  {
   printf("error in 'signal_source_four_phase':  duty_cycle must be <= 0.4\n");
   printf("   in this case, duty_cycle was set to '%5.3e'\n",duty_cycle);
   printf("   -> please update the appropriate 'signal_source_four_phase'\n");
   printf("      block within your schematic\n");
   exit(1);
  }
delay_val = (1.0/(Ts*frequency))*duty_cycle;
duty_delay.set_nom_delay(delay_val);
delay_val = (1.0/(Ts*frequency))*0.25;
delay2.set_nom_delay(delay_val);
delay_val = (1.0/(Ts*frequency))*0.5;
delay3.set_nom_delay(delay_val);
delay_val = (1.0/(Ts*frequency))*0.75;
delay4.set_nom_delay(delay_val);

code:  
siggen1.inp(phase);
duty_delay.inp(siggen1.out);
and1.inp(siggen1.out,-duty_delay.out);
delay2.inp(and1.out);
delay3.inp(and1.out);
delay4.inp(and1.out);

ph1 = and1.out;
ph2 = delay2.out;
ph3 = delay3.out;
ph4 = delay4.out;